Hiring Design Verification Engineer

Location: Bangalore Qualification: BTech/MTech Experience: 3 to 5 years Job responsibility: • Verification of complex IPs part of various AMD processor SOCs. • Understanding architecture and microarchitecture of processor and memory sub systems, DRAM interface protocols like DDR, LPDDR etc • Test Planning, Implementation and Execution. • Develop System Verilog (UVM) or C/C++ testbench and verification components. • Maintain and Interface with existing random generators, models and APIs • Executing verification through directed and random tests for its functionality and interface protocols and tracking bug reports. • Debugging regression failures and identify the cause. • Have in depth knowledge and hands-on experience in complex IP or ASIC or SoC design and functional verification • Expertise in UVM based verification methodology • Proficiency in System Verilog, C or C++ • Should be able to work closely with architects, RTL Designers and DV engineers across multiple sites. • Goodcommunication & Analytical thinking skills. Contact: HR Vaishnavi - 7395807355 / hr3.jsc@jobstoreconsulting.com